1. Field of the Invention
The present invention generally relates to the detection of the supply state of a load supplied by a variable voltage (A.C. or unipolar) and more specifically the supervision of the state of this load and of one or several switches controlling it.
The present invention more specifically applies to the detection of possible failures of the load or of switches in series with this load.
2. Discussion of the Related Art
FIG. 1 shows a conventional example of an assembly of supervision of the state of a load Q supplied by an A.C. voltage Vac under control of two switches T and SW. This example relates to the control of the motor (load Q) of a washing machine under the action of a first switch formed of a triac T receiving a control signal CT from a programmer (not shown). A second switch SW symbolizes a door-opening detection contact of the machine to interrupt the motor supply in case of an opening (turning-off of switch SW). Triac T is in series with load Q and switch SW between two terminals 1 and 2 of application of A.C. voltage Vac (generally, the electric distribution mains voltage).
The supervision of the respective states of the motor and of the switches is performed by analyzing the voltage at point 3 of interconnection of triac T and of motor Q. Two resistors R1 and R2 (generally of identical values) are respectively connected between terminal 2 and node 3, and between node 3 and a node 4 for sampling an analog measurement voltage Van. Voltage Van is applied to input IN of an analog-to-digital converter 5 (ADC). Converter 5 is supplied by a D.C. voltage Vdc, applied between terminals 6 and 7, which is low as compared with A.C. voltage Vac (typically 5 to 10 volts, to be compared with 110 or 220 volts). To provide a voltage Van of relatively low level with respect to voltage Vac, node 4 corresponds to the midpoint of a resistive dividing bridge, formed of two resistors RH and RL generally of the same value, in series between terminals 6 and 7. Accordingly, the quiescent level of the converter approximately corresponds to half voltage Vdc (Vdc/2). Voltage reference input VREF of converter 5 is connected to terminal 6 and its digital inputs are intended to be interpreted, for example, by a microprocessor or microcontroller PC (not shown). In the example shown, an 8-bit converter is considered.
The selection of node 3 to supervise the analog voltage across the load enables reading several voltages according to the respective states of switches T and SW.
FIG. 2 shows examples of shapes of analog voltage Van along time in a period of A.C. supply voltage Vac.
When triac T is on, whatever the state of switch SW, voltage Vac is found at node 3 and at node 6. Accordingly, voltage Van remains constant at quiescent median value MED of the converter (full line TON in FIG. 2).
When triac T is off, voltage Van follows an A.C. course having its amplitude depending on the other states.
If, the triac being off, switch SW is on, load Q which exhibits in normal operation a low impedance with respect to resistor R1 brings, in a way, node 3 to the voltage of node 2. Sinusoidal voltage Van (dotted line SWONLOK in FIG. 2) varies between a voltage THH slightly smaller than voltage Vdc and a voltage THL slightly greater than ground. Difference Vdc−VTH corresponds to the minimum voltage drop in resistor RH. Level THL corresponds to the minimum voltage drop in resistor RL.
If, the triac being off, switch SW is also off, a sinusoid (shape in full line LDEF) of amplitude smaller than that of the preceding operation (shape SWONLOK) is found on input IN of converter 5. This case also corresponds to the case where switch SW is on, while load Q is defective, that is, it exhibits an impedance greater than that of its normal operation.
In the case where switch SW is correctly on but triac T is defective, that is, it has a diode behavior, voltage Van has a median level MED in one halfwave and, in the other halfwave, follows previously-described shape SWONLOK. This shape of defective triac T is shown by a stripe-dot line TDEF in FIG. 2.
Finally, if voltage Van remains constant at a level comprised between threshold THH and voltage Vdc, this means that resistor RL is broken (off circuit). Similarly, if voltage Van remains constantly under threshold THL, this means that resistor RH is broken.
A problem of conventional circuits for supervising the state of a load and of its switches is linked to the tolerances of the different components and mainly to the possible variations of the voltage reference of converter 5 which is provided by voltage Vdc, likely not to have a perfect stability.
Such imperfections result in that the different cases of operation described in relation with FIG. 2 are likely to translate as sinusoids strongly different from one another.
FIG. 3 illustrates, in the case of an A.C. voltage of a 50-Hz frequency, the possible ranges of variation of the different shapes.
To be able to exploit the results of the detection, voltage Van is compared with threshold voltages, and more specifically the digital outputs of converter 5 are compared with digital values. In addition to thresholds THH and THL, intermediary thresholds THIHH and THIHL are set between threshold THH and median value MED, and thresholds THILH and THILL are set between the median value and threshold THL.
If voltage Van ranges, in positive halfwaves, between thresholds THIHH and THH and, during negative halfwaves, between thresholds THIHL and THL, this means (SWONLOK) that the triac is off while switch SW is on, the load being normal.
If voltage Van ranges, in one of the two halfwaves, between thresholds THIHH and THH or THILL and THL, and remains between thresholds THILL and THILH in the other halfwaves, this means (TDEF) a malfunction of the triac which does not turn on one halfwave out of two (or which is defective in diode mode).
If voltage Van ranges, in positive halfwaves, between thresholds THILH and THIHH and, in negative halfwaves, between thresholds THILL and THIHL, this means (LDEF) that switch SW and triac T are off, or that switch SW is on (triac T off) and that the load is defective.
If voltage Van constantly is between thresholds THIHL and THILL, this means (TON) that the triac is on.
If voltage Van is constantly between thresholds THH and Vdc or smaller than threshold THL, this indicates a defect of the measurement circuit.
The above tests are only valid at given times of the halfwaves. Indeed, the A.C. shape of the measured signal Van and the possible variation ranges of these shapes result in that, in practice, a possible detection time window is limited to each halfwave in the vicinity of the maximum of this halfwave. In the example of FIG. 3 applied to a 50-Hz frequency, it can be seen that the possible detection window (W) is of approximately 2 milliseconds around the maximum of each halfwave.
A disadvantage is that there are significant risks of false detection in case of a loss of synchronism of the measurement or in case of a distortion of voltage Vac (wrong shape factor).
Another disadvantage is that the possibility of performing a single measurement per half period slows down the detection. The reliability of the detection thus is sensitive to a possible variation of A.C. voltage Vac.
Another disadvantage is that a circuit of supervision of the load state is not transposable without modifications to a mains voltage of different frequency or amplitude.